Nios II processor, intended for a user who wishes to implement a Nios II based system on the Altera DE2 board. 1 Nios II System The Nios II processor can be used with a variety of other components to form a complete system. These compo-nents include a number of standard peripherals, but it is also possible to define custom peripherals. Altera ALTERA Cyclone IV Development & Education Board (DE2-115) 17 ~ 18 CONTENT Cover Page, Placement,TOP 05 ETHERNET CLOCK, IrDA, PS2 , RS232 , BUTTON , SWITCH , HSMC, EEPROM 09 FPGA LCD , LED , 7SEGMENT 08 USB DEVICE 20 02 MEMORY 88E1111 07 AUDIO 06 VIDEO ADV7123, ADV7180 04 IN/OUT ISP1362 POWER 1.2V, 1.8V, 2.5V, 3.3V, 5V 26 ~ 27 Title Size Altera Corporation 1 DE2 Development and Education Board Thank you for using the Altera DE2 Development and Education board. The purpose of this board is to provide the ideal vehicle for learning about digital logic, computer organization, and FPGAs. It uses the state-of-the-art technology in both hardware and CAD tools to expose students and professionals to a wide range of topics. DE2 User Manual 4 Chapter 2 Altera DE2 Board This chapter presents the features and design characteristics of the DE2 board. 2.1 Layout and Components A photograph of the DE2 board is shown in Figure 2.1. It depicts the layout of the board and indicates the location of the connectors and key components. Figure 2.1. The DE2 board. Connect the USB cable from PC to your DE2 board 2. Connect the 9V adapter cable to the DE2 board 3. Connect your LCD Monitor to your DE2. 4. Connect your headset to your DE2. 5. Press the Power ON/OFF Switch on DE2 6. Make sure the [RUN<->PROG] switch is set to RUN position (Note that PROG position is only used for AS Mode programming). Programming and configuring the FPGA chip on the Altera‟s DE2 board 4.1. Creating a project and importing a pre-designed circuit Step 1: Starting the Quartus II software. Click All Programs ECE Altera Quartus II 9.0 Web Edition Quartus II 9.0 Web Edition from the Windows Start menu to open the Quartus II software. The process for installing on the host computer the necessary software device driver that communicates with the USB Blaster is described in the tutorial Getting Started with Altera's DE2 Board. This tutorial is available on the DE2 System CD-ROM and from the Altera DE2 web pages. 24 DE2 User Manual. Configuring the FPGA in JTAG Mode DE2_pin_assignments.csv file as elements of arrays SW and LEDG, we must refer to them in the same way in the design file. For example, in the DE2_pin_assignments.csv file the 18 toggle switches are called SW[17] to SW[0]; since VHDL uses parentheses rather than square brackets, these switches are referred to as SW(17) to SW(0). They can DE2: DE2_115: FPGA: Cyclone II EP2C35F672C6 with EPCS16 16-Mbit serial configuration device Cyclone II EP2C35F672C6 device [Cyclone II Device Handbook, pdf, 470pp, (c Altera DE2-115Make sure the RUN/PROG switch (SW19; leftmost toggle switch) is set to RUN Verify your results (1) Verify your results (2) •Students shall be prepared upon arrival at the lab sessions. Pre-labof each section will be taken per-group. •If a group member is not shown, a ZERO mark will count. The DE2 Basic Computer with the components used in this tutorial. To configure the FPGA on the DE2 board with this circuit follow these steps: 1. Open Altera's Quartus II software. 2. Click File > Open Project. 3. The location of the DE2 Basic Computer files will depend on w here you have Nios II installed. The DE2 Basi