Contact your Intel representative to obtain the latest Intel product specifications and roadmaps Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1- 800-548-4725, or by visiting intel.com/design/literature.htm. x86-64 Instructions Set CPU instructions The general-purpose instructions perform basic data movement, arithmetic, logic, program flow, and string operations which programmers commonly use to write application and system software to run on Intel 64 and IA-32 processors. about this manual 1.1. overview of the intel architecture software developer's manual, volume 2: instruction set reference 1-1 1.2. overview of the intel architecture software developer's manual, volume 1: basic architecture 1-2 1.3. overview of the intel architecture software developer's manual, volume 3: system programming guide 1-3 1.4. The Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 1, describes the basic architecture and programming environment of Intel 64 and IA-32 processors. The Intel® 64 and IA-32 Architectures Software Developer's Manual, Volumes 2A & 2B, describe the instruction set of the processor and the opcode structure. x86 Assembly Language. The family of x86 assembly languages represents decades of advances on the original Intel 8086 architecture. In addition to there being several different dialects based on the assembler used, additional processor instructions, registers and other features have been added over the years while still remaining backwards compatible to the 16-bit assembly used in the 1980s. The full x86 instruction set is large and complex (Intel's x86 instruction set manuals comprise over 2900 pages), and we do not cover it all in this guide. For example, there is a 16-bit subset of the x86 instruction set. Using the 16-bit programming model can be quite complex. It has a segmented memory model, more restrictions on register •According to Intel's manual, the 'cmpxchg' instruction also uses two 'implicit' operands (i.e., operands not mentioned in the instruction) -The CPU's accumulator register -The CPU's EFLAGS register •The accumulator-register (EAX) is both a source-operand and a destination-operand •The six status-bits in the EFLAGS Title: Intel 8086 Family User's Manual October 1979 Author: INTEL Keywords: Intel 8086 8088 8089 microprocessor Created Date: 5/8/2009 5:36:54 PM The basic architecture of the x86-64 is described in Volume 1 of the System Developer's Manual. The following diagram is taken directly from Chapter 3 in this volume: Registers Application Programmers generally use only the general purpose registers, floating point registers, XMM, and YMM registers. General Purpose Registers x86-64 Instructions and ABI 1 Introduction You will be generating assembly code for the x86-64 architecture, which is the 64-bit extension to Intel's venerable x86 architecture. Most instructions in this architecture have two operands: a source and a destination that specifies the second operand and the location of the result. Operands Additional copies of this manual or other Intel literature may be obtained from: Intel Corporation Literature Distribution Mail Stop SC6-59 3065 Bowers Avenue Santa Clara, CA 95051 INTEL CORPORATION 1987 CG-5/26/87 Edited 2001-02-01 by G.N. INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986 Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 2B. Note: The Intel 64 and IA-32 Architectures Software Deve